Lines Matching +full:0 +full:x8f000

49   "^display-controller@[0-9a-f]+$":
57   "^dsi@[0-9a-f]+$":
67   "^phy@[0-9a-f]+$":
93         reg = <0x05e00000 0x1000>;
110         iommus = <&apps_smmu 0x420 0x2>,
111                  <&apps_smmu 0x421 0x0>;
116             reg = <0x05e01000 0x8f000>,
117                   <0x05eb0000 0x2008>;
131             interrupts = <0>;
135                 #size-cells = <0>;
137                 port@0 {
138                     reg = <0>;
149             reg = <0x05e94000 0x400>;
168             assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
177             #size-cells = <0>;
181                 #size-cells = <0>;
183                 port@0 {
184                     reg = <0>;
200             reg = <0x05e94400 0x100>,
201                   <0x05e94500 0x300>,
202                   <0x05e94800 0x188>;
208             #phy-cells = <0>;