display/msm/dsi-phy-7nm.yaml

1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-7nm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DSI 7nm PHY
10   - Jonathan Marek <jonathan@marek.ca>
13   - $ref: dsi-phy-common.yaml#
18       - qcom,dsi-phy-7nm
19       - qcom,dsi-phy-7nm-8150
20       - qcom,sc7280-dsi-phy-7nm
21       - qcom,sm6375-dsi-phy-7nm
22       - qcom,sm8350-dsi-phy-5nm
23       - qcom,sm8450-dsi-phy-5nm
24       - qcom,sm8550-dsi-phy-4nm
25       - qcom,sm8650-dsi-phy-4nm
29       - description: dsi phy register set
30       - description: dsi phy lane register set
31       - description: dsi pll register set
33   reg-names:
35       - const: dsi_phy
36       - const: dsi_phy_lane
37       - const: dsi_pll
39   vdds-supply:
43   phy-type:
44     description: D-PHY (default) or C-PHY mode
49   - compatible
50   - reg
51   - reg-names
56   - |
57      #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
58      #include <dt-bindings/clock/qcom,rpmh.h>
60      dsi-phy@ae94400 {
61          compatible = "qcom,dsi-phy-7nm";
65          reg-names = "dsi_phy",
69          #clock-cells = <1>;
70          #phy-cells = <0>;
72          vdds-supply = <&vreg_l5a_0p88>;
75          clock-names = "iface", "ref";