display/msm/dsi-phy-28nm.yaml

1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-28nm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DSI 28nm PHY
10   - Krishna Manikandan <quic_mkrishn@quicinc.com>
13   - $ref: dsi-phy-common.yaml#
18       - qcom,dsi-phy-28nm-8226
19       - qcom,dsi-phy-28nm-8937
20       - qcom,dsi-phy-28nm-8960
21       - qcom,dsi-phy-28nm-hpm
22       - qcom,dsi-phy-28nm-hpm-fam-b
23       - qcom,dsi-phy-28nm-lp
27       - description: dsi pll register set
28       - description: dsi phy register set
29       - description: dsi phy regulator register set
31   reg-names:
33       - const: dsi_pll
34       - const: dsi_phy
35       - const: dsi_phy_regulator
37   vddio-supply:
38     description: Phandle to vdd-io regulator device node.
40   qcom,dsi-phy-regulator-ldo-mode:
42     description: Indicates if the LDO mode PHY regulator is wanted.
45   - compatible
46   - reg
47   - reg-names
48   - vddio-supply
53   - |
54      #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
55      #include <dt-bindings/clock/qcom,rpmh.h>
57      dsi-phy@fd922a00 {
58          compatible = "qcom,dsi-phy-28nm-lp";
62          reg-names = "dsi_pll",
66          #clock-cells = <1>;
67          #phy-cells = <0>;
69          vddio-supply = <&vddio_reg>;
73          clock-names = "iface", "ref";