bindings/display/mipi-dsi-bus.txt

4 The MIPI Display Serial Interface specifies a serial bus and a protocol for
6 define the syntax used to represent a DSI bus in a device tree.
8 This document describes DSI bus-specific properties only or defines existing
9 standard properties in the context of the DSI bus.
11 Each DSI host provides a DSI bus. The DSI host controller's node contains a
12 set of properties that characterize the bus. Child nodes describe individual
13 peripherals on that bus.
21 In addition to the standard properties and those defined by the parent bus of
25 - #address-cells: The number of cells required to represent an address on the
26   bus. DSI peripherals are addressed using a 2-bit virtual channel number, so
27   a maximum of 4 devices can be addressed on a single bus. Hence the value of
29 - #size-cells: Should be 0. There are cases where it makes sense to use a
33 - clock-master: boolean. Should be enabled if the host is being used in
42 Peripherals with DSI as control bus, or no control bus
43 ------------------------------------------------------
45 Peripherals with the DSI bus as the primary control bus, or peripherals with
46 no control bus but use the DSI bus to transmit pixel data are represented
49 device-specific properties.
52 - reg: The virtual channel number of a DSI peripheral. Must be in the range
57 - The reg property can take multiple entries, one for each virtual channel
59 - If the virtual channels that a peripheral responds to are consecutive, the
60   #size-cells can be set to 1. The first cell of each entry in the reg
64 Peripherals with a different control bus
65 ----------------------------------------
67 There are peripherals that have I2C/SPI (or some other non-DSI bus) as the
68 primary control bus, but are also connected to a DSI bus (mostly for the data
73 -----------------------------------------
76 busses. Each DSI bus/channel drives some portion of the pixel data (generally
83 [2] Documentation/devicetree/bindings/media/video-interfaces.txt
87 - (1), (2) and (3) are examples of a DSI host and peripheral on the DSI bus
89 - (4) is an example of a peripheral on a I2C control bus connected to a
90   DSI host using of-graph bindings.
91 - (5) is an example of 2 DSI hosts driving a dual-channel DSI peripheral,
92   which uses I2C as its primary control bus.
95 	dsi-host {
98 		#address-cells = <1>;
99 		#size-cells = <0>;
111 	dsi-host {
114 		#address-cells = <1>;
115 		#size-cells = <0>;
127 	dsi-host {
130 		#address-cells = <1>;
131 		#size-cells = <1>;
143 	i2c-host {
146 		dsi-bridge@35 {
155 						remote-endpoint = <&host_mipi_out>;
162 	dsi-host {
170 					remote-endpoint = <&bridge_mipi_in>;
177 	i2c-host {
178 		dsi-bridge@35 {
183 				#address-cells = <1>;
184 				#size-cells = <0>;
189 						remote-endpoint = <&dsi0_out>;
196 						remote-endpoint = <&dsi1_out>;
203 	dsi0-host {
210 		clock-master;
217 					remote-endpoint = <&dsi0_in>;
223 	dsi1-host {
231 					remote-endpoint = <&dsi1_in>;