Lines Matching +full:devicetree +full:- +full:org
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,ovl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
24 - enum:
25 - mediatek,mt2701-disp-ovl
26 - mediatek,mt8173-disp-ovl
27 - mediatek,mt8183-disp-ovl
28 - mediatek,mt8192-disp-ovl
29 - mediatek,mt8195-mdp3-ovl
30 - items:
31 - enum:
32 - mediatek,mt7623-disp-ovl
33 - mediatek,mt2712-disp-ovl
34 - const: mediatek,mt2701-disp-ovl
35 - items:
36 - enum:
37 - mediatek,mt6795-disp-ovl
38 - const: mediatek,mt8173-disp-ovl
39 - items:
40 - enum:
41 - mediatek,mt8188-disp-ovl
42 - mediatek,mt8195-disp-ovl
43 - const: mediatek,mt8183-disp-ovl
44 - items:
45 - enum:
46 - mediatek,mt8186-disp-ovl
47 - mediatek,mt8365-disp-ovl
48 - const: mediatek,mt8192-disp-ovl
56 power-domains:
59 Documentation/devicetree/bindings/power/power-domain.yaml for details.
63 - description: OVL Clock
68 see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
70 mediatek,gce-client-reg:
74 defined in the header include/dt-bindings/gce/<chip>-gce.h.
75 $ref: /schemas/types.yaml#/definitions/phandle-array
79 - compatible
80 - reg
81 - interrupts
82 - power-domains
83 - clocks
84 - iommus
89 - |
90 #include <dt-bindings/interrupt-controller/arm-gic.h>
91 #include <dt-bindings/clock/mt8173-clk.h>
92 #include <dt-bindings/power/mt8173-power.h>
93 #include <dt-bindings/gce/mt8173-gce.h>
94 #include <dt-bindings/memory/mt8173-larb-port.h>
97 #address-cells = <2>;
98 #size-cells = <2>;
101 compatible = "mediatek,mt8173-disp-ovl";
104 power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
107 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>;