Lines Matching +full:dpi +full:- +full:to +full:- +full:lvds
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,dpi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek DPI and DP_INTF Controller
10 - CK Hu <ck.hu@mediatek.com>
11 - Jitao shi <jitao.shi@mediatek.com>
14 The MediaTek DPI and DP_INTF function blocks are a sink of the display
15 subsystem and provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a
21 - enum:
22 - mediatek,mt2701-dpi
23 - mediatek,mt7623-dpi
24 - mediatek,mt8173-dpi
25 - mediatek,mt8183-dpi
26 - mediatek,mt8186-dpi
27 - mediatek,mt8188-dp-intf
28 - mediatek,mt8192-dpi
29 - mediatek,mt8195-dp-intf
30 - items:
31 - enum:
32 - mediatek,mt6795-dpi
33 - const: mediatek,mt8183-dpi
34 - items:
35 - enum:
36 - mediatek,mt8365-dpi
37 - const: mediatek,mt8192-dpi
47 - description: Pixel Clock
48 - description: Engine Clock
49 - description: DPI PLL
51 clock-names:
53 - const: pixel
54 - const: engine
55 - const: pll
57 pinctrl-0: true
58 pinctrl-1: true
60 pinctrl-names:
62 - const: default
63 - const: sleep
65 power-domains:
67 The MediaTek DPI module is typically associated with one of the
74 It is recommended to explicitly add the appropriate power domain
75 property to the DPI node in the device tree.
81 Output port node. This port should be connected to the input port of an
82 attached HDMI, LVDS or DisplayPort encoder chip.
85 - compatible
86 - reg
87 - interrupts
88 - clocks
89 - clock-names
90 - port
95 - |
96 #include <dt-bindings/interrupt-controller/arm-gic.h>
97 #include <dt-bindings/clock/mt8173-clk.h>
99 dpi0: dpi@1401d000 {
100 compatible = "mediatek,mt8173-dpi";
106 clock-names = "pixel", "engine", "pll";
107 pinctrl-names = "default", "sleep";
108 pinctrl-0 = <&dpi_pin_func>;
109 pinctrl-1 = <&dpi_pin_idle>;
113 remote-endpoint = <&hdmi0_in>;