display/bridge/thine%2Cthc63lvd1024.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Jacopo Mondi <jacopo+renesas@jmondi.org>
11   - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
15   streams to parallel data outputs. The chip supports single/dual input/output
19   Single or dual operation mode, output data mapping and DDR output modes are
30       The device can operate in single or dual input and output modes.
32       When operating in single input mode, all pixels are received on port@0,
33       and port@1 shall not contain any endpoint. In dual input mode,
34       even-numbered pixels are received on port@0 and odd-numbered pixels on
35       port@1, and both port@0 and port@1 shall contain endpoints.
37       When operating in single output mode all pixels are output from the first
38       CMOS/TTL port and port@3 shall not contain any endpoint. In dual output
39       mode pixels are output from both CMOS/TTL ports and both port@2 and
40       port@3 shall contain endpoints.
43       port@0:
44         $ref: /schemas/graph.yaml#/properties/port
45         description: First LVDS input port
47       port@1:
48         $ref: /schemas/graph.yaml#/properties/port
49         description: Second LVDS input port
51       port@2:
52         $ref: /schemas/graph.yaml#/properties/port
55       port@3:
56         $ref: /schemas/graph.yaml#/properties/port
60       - port@0
61       - port@2
63   oe-gpios:
67   powerdown-gpios:
71   vcc-supply:
77   - compatible
78   - ports
79   - vcc-supply
84   - |
85     #include <dt-bindings/gpio/gpio.h>
87     lvds-decoder {
90         vcc-supply = <&reg_lvds_vcc>;
91         powerdown-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
94             #address-cells = <1>;
95             #size-cells = <0>;
97             port@0 {
101                     remote-endpoint = <&lvds_out>;
105             port@2 {
109                     remote-endpoint = <&adv7511_in>;