display/bridge/renesas%2Cdsi-csi2-tx.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/renesas,dsi-csi2-tx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car MIPI DSI/CSI-2 Encoder
10   - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13   This binding describes the MIPI DSI/CSI-2 encoder embedded in the Renesas
14   R-Car Gen4 SoCs. The encoder can operate in either DSI or CSI-2 mode, with up
15   to four data lanes.
20       - renesas,r8a779a0-dsi-csi2-tx    # for V3U
21       - renesas,r8a779g0-dsi-csi2-tx    # for V4H
28       - description: Functional clock
29       - description: DSI (and CSI-2) functional clock
30       - description: PLL reference clock
32   clock-names:
34       - const: fck
35       - const: dsi
36       - const: pll
38   power-domains:
53         $ref: /schemas/graph.yaml#/$defs/port-base
55         description: DSI/CSI-2 output port
59             $ref: /schemas/media/video-interfaces.yaml#
63               data-lanes:
68               - data-lanes
71       - port@0
72       - port@1
75   - compatible
76   - reg
77   - clocks
78   - power-domains
79   - resets
80   - ports
85   - |
86     #include <dt-bindings/clock/r8a779a0-cpg-mssr.h>
87     #include <dt-bindings/power/r8a779a0-sysc.h>
89     dsi0: dsi-encoder@fed80000 {
90         compatible = "renesas,r8a779a0-dsi-csi2-tx";
92         power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
96         clock-names = "fck", "dsi", "pll";
100             #address-cells = <1>;
101             #size-cells = <0>;
106                     remote-endpoint = <&du_out_dsi0>;
113                     data-lanes = <1 2>;
114                     remote-endpoint = <&sn65dsi86_in>;