display/bridge/fsl%2Cimx93-mipi-dsi.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx93-mipi-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Liu Ying <victor.liu@nxp.com>
15   and extensions to them are controlled by i.MX93 media blk-ctrl.
18   - $ref: snps,dw-mipi-dsi.yaml#
22     const: fsl,imx93-mipi-dsi
26       - description: apb clock
27       - description: pixel clock
28       - description: PHY configuration clock
29       - description: PHY reference clock
31   clock-names:
33       - const: pclk
34       - const: pix
35       - const: phy_cfg
36       - const: phy_ref
41   fsl,media-blk-ctrl:
44       i.MX93 media blk-ctrl, as a syscon, controls pixel component bit map
49   power-domains:
53   - compatible
54   - interrupts
55   - fsl,media-blk-ctrl
56   - power-domains
61   - |
62     #include <dt-bindings/clock/imx93-clock.h>
63     #include <dt-bindings/gpio/gpio.h>
64     #include <dt-bindings/interrupt-controller/arm-gic.h>
65     #include <dt-bindings/power/fsl,imx93-power.h>
68         compatible = "fsl,imx93-mipi-dsi";
75         clock-names = "pclk", "pix", "phy_cfg", "phy_ref";
76         fsl,media-blk-ctrl = <&media_blk_ctrl>;
77         power-domains = <&media_blk_ctrl IMX93_MEDIABLK_PD_MIPI_DSI>;
78         #address-cells = <1>;
79         #size-cells = <0>;
84             reset-gpios = <&adp5585gpio 6 GPIO_ACTIVE_LOW>;
85             dsi-lanes = <4>;
86             video-mode = <2>;
90                     remote-endpoint = <&dsi_out>;
96             #address-cells = <1>;
97             #size-cells = <0>;
103                     remote-endpoint = <&lcdif_to_dsi>;
111                     remote-endpoint = <&panel_in>;