display/bridge/fsl%2Cimx8qxp-pixel-link.yaml

4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml#
7 title: Freescale i.MX8qm/qxp Display Pixel Link
13   The Freescale i.MX8qm/qxp Display Pixel Link(DPL) forms a standard
14   asynchronous linkage between pixel sources(display controller or
15   camera module) and pixel consumers(imaging or displays).
16   It consists of two distinct functions, a pixel transfer function and a
17   control interface.  Multiple pixel channels can exist per one control channel.
18   This binding documentation is only for pixel links whose pixel sources are
21   The i.MX8qm/qxp Display Pixel Link is accessed via System Controller Unit(SCU)
27       - fsl,imx8qm-dc-pixel-link
28       - fsl,imx8qxp-dc-pixel-link
33       u8 value representing the display controller index that the pixel link
39       u8 value representing the display controller stream index that the pixel
49         description: The pixel link input port node from upstream video source.
54         description: The pixel link output port node to downstream bridge.
68             const: fsl,imx8qxp-dc-pixel-link
78             const: fsl,imx8qm-dc-pixel-link
94     dc0-pixel-link0 {
95         compatible = "fsl,imx8qxp-dc-pixel-link";
103             /* from dc0 pixel combiner channel0 */