Lines Matching +full:dual +full:- +full:lvds +full:- +full:even +full:- +full:pixels
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8qm/qxp LVDS Display Bridge
10 - Liu Ying <victor.liu@nxp.com>
13 The Freescale i.MX8qm/qxp LVDS Display Bridge(LDB) has two channels.
23 LDB split mode to support a dual link LVDS display. The channel indexes
24 have to be different. Channel0 outputs odd pixels and channel1 outputs
25 even pixels.
29 in dual mode or split mode. In dual mode, the two channels output identical
30 data. In split mode, channel0 outputs odd pixels and channel1 outputs even
31 pixels.
41 - fsl,imx8qm-ldb
42 - fsl,imx8qxp-ldb
44 "#address-cells":
47 "#size-cells":
52 - description: pixel clock
53 - description: bypass clock
55 clock-names:
57 - const: pixel
58 - const: bypass
60 power-domains:
63 fsl,companion-ldb:
69 "^channel@[0-1]$":
74 "#address-cells":
77 "#size-cells":
85 description: A phandle to the phy module representing the LVDS PHY.
88 phy-names:
100 - "#address-cells"
101 - "#size-cells"
102 - reg
103 - phys
104 - phy-names
109 - compatible
110 - "#address-cells"
111 - "#size-cells"
112 - clocks
113 - clock-names
114 - power-domains
115 - channel@0
116 - channel@1
119 - if:
123 const: fsl,imx8qm-ldb
126 fsl,companion-ldb: false
131 - |
132 #include <dt-bindings/firmware/imx/rsrc.h>
134 #address-cells = <1>;
135 #size-cells = <0>;
136 compatible = "fsl,imx8qxp-ldb";
139 clock-names = "pixel", "bypass";
140 power-domains = <&pd IMX_SC_R_LVDS_0>;
143 #address-cells = <1>;
144 #size-cells = <0>;
147 phy-names = "lvds_phy";
153 remote-endpoint = <&mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0>;
159 #address-cells = <1>;
160 #size-cells = <0>;
163 phy-names = "lvds_phy";
169 remote-endpoint = <&mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1>;