Lines Matching +full:0 +full:x01c16000

53           - const: pll-0
60           - const: pll-0
82       port@0:
94       - port@0
133         reg = <0x01c16000 0x1000>;
138         clock-names = "ahb", "mod", "pll-0", "pll-1";
146             #size-cells = <0>;
148             hdmi_in: port@0 {
150                 #size-cells = <0>;
151                 reg = <0>;
153                 hdmi_in_tcon0: endpoint@0 {
154                     reg = <0>;