bindings/cpufreq/brcm%2Cstb-avs-cpu-freq.txt

1 Broadcom AVS mail box and interrupt register bindings
4 A total of three DT nodes are required. One node (brcm,avs-cpu-data-mem)
5 references the mailbox register used to communicate with the AVS CPU[1]. The
6 second node (brcm,avs-cpu-l2-intr) is required to trigger an interrupt on
7 the AVS CPU. The interrupt tells the AVS CPU that it needs to process a
8 command sent to it by a driver. Interrupting the AVS CPU is mandatory for
11 The interface also requires a reference to the AVS host interrupt controller,
12 so a driver can react to interrupts generated by the AVS CPU whenever a command
13 has been processed. See [2] for more information on the brcm,l2-intc node.
15 [1] The AVS CPU is an independent co-processor that runs proprietary
19 [2] Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.yaml
22 Node brcm,avs-cpu-data-mem
23 --------------------------
26 - compatible: must include: brcm,avs-cpu-data-mem and
27               should include: one of brcm,bcm7271-avs-cpu-data-mem or
28                               brcm,bcm7268-avs-cpu-data-mem
29 - reg: Specifies base physical address and size of the registers.
30 - interrupts: The interrupt that the AVS CPU will use to interrupt the host
32 - interrupt-names: The name of the interrupt used to interrupt the host.
35 - None
37 Node brcm,avs-cpu-l2-intr
38 -------------------------
41 - compatible: must include: brcm,avs-cpu-l2-intr and
42               should include: one of brcm,bcm7271-avs-cpu-l2-intr or
43                               brcm,bcm7268-avs-cpu-l2-intr
44 - reg: Specifies base physical address and size of the registers.
47 - None
53 	avs_host_l2_intc: interrupt-controller@f04d1200 {
54 		#interrupt-cells = <1>;
55 		compatible = "brcm,l2-intc";
56 		interrupt-parent = <&intc>;
58 		interrupt-controller;
60 		interrupt-names = "avs";
63 	avs-cpu-data-mem@f04c4000 {
64 		compatible = "brcm,bcm7271-avs-cpu-data-mem",
65 				"brcm,avs-cpu-data-mem";
68 		interrupt-parent = <&avs_host_l2_intc>;
69 		interrupt-names = "sw_intr";
72 	avs-cpu-l2-intr@f04d1100 {
73 		compatible = "brcm,bcm7271-avs-cpu-l2-intr",
74 				"brcm,avs-cpu-l2-intr";