Lines Matching full:divisor
6 the register is one less than the actual divisor value. E.g:
8 register value actual divisor value
15 ti,index-starts-at-one - valid divisor values start at 1, not the default
17 register value actual divisor value
22 ti,index-power-of-two - valid divisor values are powers of two. E.g:
23 register value actual divisor value
32 Which will map the resulting values to a divisor table by their index:
33 register value actual divisor value
36 2 <invalid divisor, skipped>
63 - ti,min-div : min divisor for dividing the input clock rate, only
64 needed if the first divisor is offset from the default value (1)
65 - ti,max-div : max divisor for dividing the input clock rate, only needed
67 - ti,index-starts-at-one : valid divisor programming starts at 1, not zero,
69 - ti,index-power-of-two : valid divisor programming must be a power of two,