Lines Matching full:divider
1 Binding for TI divider clock
4 register-mapped adjustable clock rate divider that does not gate and has
42 The binding must also provide the register to control the divider and
43 unless the divider array is provided, min and max dividers. Optionally
54 - compatible : shall be "ti,divider-clock" or "ti,composite-divider-clock".
57 - reg : offset for register controlling adjustable divider
62 - ti,bit-shift : number of bits to shift the divider value, defaults to 0
76 - ti,latch-bit : latch the divider value to HW, only needed if the register
77 access requires this. As an example dra76x DPLL_GMAC H14 divider implements
83 compatible = "ti,divider-clock";
92 compatible = "ti,divider-clock";
101 compatible = "ti,composite-divider-clock";
110 compatible = "ti,composite-divider-clock";