bindings/clock/starfive%2Cjh7110-pll.yaml

1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/starfive,jh7110-pll.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12   registers in the sys syscon. So the PLLs node should be a child of
13   SYS-SYSCON node.
18   - Xingyu Wu <xingyu.wu@starfivetech.com>
22     const: starfive,jh7110-pll
28   '#clock-cells':
31       See <dt-bindings/clock/starfive,jh7110-crg.h> for valid indices.
34   - compatible
35   - clocks
36   - '#clock-cells'
41   - |
42     clock-controller {
43       compatible = "starfive,jh7110-pll";
45       #clock-cells = <1>;