bindings/clock/st%2Cstm32-rcc.txt

1 STMicroelectronics STM32 Reset and Clock Controller
4 The RCC IP is both a reset and a clock controller.
6 Please refer to clock-bindings.txt for common clock controller binding usage.
10 - compatible: Should be:
11   "st,stm32f42xx-rcc"
12   "st,stm32f469-rcc"
13   "st,stm32f746-rcc"
14   "st,stm32f769-rcc"
16 - reg: should be register base and length as documented in the
18 - #reset-cells: 1, see below
19 - #clock-cells: 2, device nodes should specify the clock in their "clocks"
20   property, containing a phandle to the clock device node, an index selecting
21   between gated clocks and other clocks and an index specifying the clock to
23 - clocks: External oscillator clock phandle
24   - high speed external clock signal (HSE)
25   - external I2S clock (I2S_CKIN)
30 		#reset-cells = <1>;
31 		#clock-cells = <2>
32 		compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
43 from the first RCC clock enable register (RCC_AHB1ENR, address offset 0x30).
48 To simplify the usage and to share bit definition with the reset and clock
49 drivers of the RCC IP, macros are available to generate the index in
50 human-readble format.
53  - include/dt-bindings/mfd/stm32f4-rcc.h
57 	/* Gated clock, AHB1 bit 0 (GPIOA) */
62 	/* Gated clock, AHB2 bit 4 (CRYP) */
76 	2	CLK_LSI		(low-power clock source)
77 	3	CLK_LSE		(generated from a 32.768 kHz low-speed external
79 	4	CLK_HSE_RTC	(HSE division factor for RTC clock)
80 	5	CLK_RTC		(real-time clock)
81 	6	PLL_VCO_I2S	(vco frequency of I2S pll)
82 	7	PLL_VCO_SAI	(vco frequency of SAI pll)
83 	8	CLK_LCD		(LCD-TFT)
90 	14	CLK_HSI		(Internal ocscillator clock)
91 	15	CLK_SYSCLK	(System Clock)
92 	16	CLK_HDMI_CEC	(HDMI-CEC clock)
93 	17	CLK_SPDIF	(SPDIF-Rx clock)
106 	30	CLK_LPTIMER	(LPTimer1 clock)
115 	/* Misc clock, FCLK */