Lines Matching +full:sg2042 +full:- +full:clkgen
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/sophgo,sg2042-rpgate.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Sophgo SG2042 Gate Clock Generator for RP(riscv processors) subsystem
10 - Chen Wang <unicorn_wang@outlook.com>
14 const: sophgo,sg2042-rpgate
21 - description: Gate clock for RP subsystem
23 clock-names:
25 - const: rpgate
27 '#clock-cells':
30 See <dt-bindings/clock/sophgo,sg2042-rpgate.h> for valid indices.
33 - compatible
34 - reg
35 - clocks
36 - clock-names
37 - '#clock-cells'
42 - |
43 clock-controller@20000000 {
44 compatible = "sophgo,sg2042-rpgate";
46 clocks = <&clkgen 85>;
47 clock-names = "rpgate";
48 #clock-cells = <1>;