Lines Matching +full:exynosautov9 +full:- +full:cmu +full:- +full:fsys2
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynosautov9-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chanho Park <chanho61.park@samsung.com>
11 - Chanwoo Choi <cw00.choi@samsung.com>
12 - Krzysztof Kozlowski <krzk@kernel.org>
13 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 - Tomasz Figa <tomasz.figa@gmail.com>
17 Exynos Auto v9 clock controller is comprised of several CMU units, generating
18 clocks for different domains. Those CMU units are modeled as separate device
21 The external OSCCLK must be defined as fixed-rate clock in dts.
23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
30 'include/dt-bindings/clock/samsung,exynosautov9.h' header.
35 - samsung,exynosautov9-cmu-top
36 - samsung,exynosautov9-cmu-busmc
37 - samsung,exynosautov9-cmu-core
38 - samsung,exynosautov9-cmu-dpum
39 - samsung,exynosautov9-cmu-fsys0
40 - samsung,exynosautov9-cmu-fsys1
41 - samsung,exynosautov9-cmu-fsys2
42 - samsung,exynosautov9-cmu-peric0
43 - samsung,exynosautov9-cmu-peric1
44 - samsung,exynosautov9-cmu-peris
50 clock-names:
54 "#clock-cells":
61 - if:
65 const: samsung,exynosautov9-cmu-top
71 - description: External reference clock (26 MHz)
73 clock-names:
75 - const: oscclk
77 - if:
81 const: samsung,exynosautov9-cmu-busmc
87 - description: External reference clock (26 MHz)
88 - description: CMU_BUSMC bus clock (from CMU_TOP)
90 clock-names:
92 - const: oscclk
93 - const: dout_clkcmu_busmc_bus
95 - if:
99 const: samsung,exynosautov9-cmu-core
105 - description: External reference clock (26 MHz)
106 - description: CMU_CORE bus clock (from CMU_TOP)
108 clock-names:
110 - const: oscclk
111 - const: dout_clkcmu_core_bus
113 - if:
117 const: samsung,exynosautov9-cmu-dpum
123 - description: External reference clock (26 MHz)
124 - description: DPU Main bus clock (from CMU_TOP)
126 clock-names:
128 - const: oscclk
129 - const: bus
131 - if:
135 const: samsung,exynosautov9-cmu-fsys0
141 - description: External reference clock (26 MHz)
142 - description: CMU_FSYS0 bus clock (from CMU_TOP)
143 - description: CMU_FSYS0 pcie clock (from CMU_TOP)
145 clock-names:
147 - const: oscclk
148 - const: dout_clkcmu_fsys0_bus
149 - const: dout_clkcmu_fsys0_pcie
151 - if:
155 const: samsung,exynosautov9-cmu-fsys1
161 - description: External reference clock (26 MHz)
162 - description: CMU_FSYS1 bus clock (from CMU_TOP)
163 - description: CMU_FSYS1 mmc card clock (from CMU_TOP)
164 - description: CMU_FSYS1 usb clock (from CMU_TOP)
166 clock-names:
168 - const: oscclk
169 - const: dout_clkcmu_fsys1_bus
170 - const: gout_clkcmu_fsys1_mmc_card
171 - const: dout_clkcmu_fsys1_usbdrd
173 - if:
177 const: samsung,exynosautov9-cmu-fsys2
183 - description: External reference clock (26 MHz)
184 - description: CMU_FSYS2 bus clock (from CMU_TOP)
185 - description: UFS clock (from CMU_TOP)
186 - description: Ethernet clock (from CMU_TOP)
188 clock-names:
190 - const: oscclk
191 - const: dout_clkcmu_fsys2_bus
192 - const: dout_fsys2_clkcmu_ufs_embd
193 - const: dout_fsys2_clkcmu_ethernet
195 - if:
199 const: samsung,exynosautov9-cmu-peric0
205 - description: External reference clock (26 MHz)
206 - description: CMU_PERIC0 bus clock (from CMU_TOP)
207 - description: PERIC0 IP clock (from CMU_TOP)
209 clock-names:
211 - const: oscclk
212 - const: dout_clkcmu_peric0_bus
213 - const: dout_clkcmu_peric0_ip
215 - if:
219 const: samsung,exynosautov9-cmu-peric1
225 - description: External reference clock (26 MHz)
226 - description: CMU_PERIC1 bus clock (from CMU_TOP)
227 - description: PERIC1 IP clock (from CMU_TOP)
229 clock-names:
231 - const: oscclk
232 - const: dout_clkcmu_peric1_bus
233 - const: dout_clkcmu_peric1_ip
235 - if:
239 const: samsung,exynosautov9-cmu-peris
245 - description: External reference clock (26 MHz)
246 - description: CMU_PERIS bus clock (from CMU_TOP)
248 clock-names:
250 - const: oscclk
251 - const: dout_clkcmu_peris_bus
254 - compatible
255 - "#clock-cells"
256 - clocks
257 - clock-names
258 - reg
264 - |
265 #include <dt-bindings/clock/samsung,exynosautov9.h>
267 cmu_fsys2: clock-controller@17c00000 {
268 compatible = "samsung,exynosautov9-cmu-fsys2";
270 #clock-cells = <1>;
276 clock-names = "oscclk",