Lines Matching full:cmu_top

23   CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
25   derived from CMU_TOP.
88             - description: CMU_BUSMC bus clock (from CMU_TOP)
106             - description: CMU_CORE bus clock (from CMU_TOP)
124             - description: DPU Main bus clock (from CMU_TOP)
142             - description: CMU_FSYS0 bus clock (from CMU_TOP)
143             - description: CMU_FSYS0 pcie clock (from CMU_TOP)
162             - description: CMU_FSYS1 bus clock (from CMU_TOP)
163             - description: CMU_FSYS1 mmc card clock (from CMU_TOP)
164             - description: CMU_FSYS1 usb clock (from CMU_TOP)
184             - description: CMU_FSYS2 bus clock (from CMU_TOP)
185             - description: UFS clock (from CMU_TOP)
186             - description: Ethernet clock (from CMU_TOP)
206             - description: CMU_PERIC0 bus clock (from CMU_TOP)
207             - description: PERIC0 IP clock (from CMU_TOP)
226             - description: CMU_PERIC1 bus clock (from CMU_TOP)
227             - description: PERIC1 IP clock (from CMU_TOP)
246             - description: CMU_PERIS bus clock (from CMU_TOP)
273                  <&cmu_top DOUT_CLKCMU_FSYS2_BUS>,
274                  <&cmu_top DOUT_CLKCMU_FSYS2_UFS_EMBD>,
275                  <&cmu_top DOUT_CLKCMU_FSYS2_ETHERNET>;