Lines Matching +full:external +full:- +full:memory +full:- +full:controller
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynos850-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos850 SoC clock controller
10 - Sam Protsenko <semen.protsenko@linaro.org>
11 - Chanwoo Choi <cw00.choi@samsung.com>
12 - Krzysztof Kozlowski <krzk@kernel.org>
13 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 - Tomasz Figa <tomasz.figa@gmail.com>
17 Exynos850 clock controller is comprised of several CMU units, generating
20 two external clocks:: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external
21 clocks must be defined as fixed-rate clocks in dts.
23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
29 'dt-bindings/clock/exynos850.h' header.
34 - samsung,exynos850-cmu-top
35 - samsung,exynos850-cmu-apm
36 - samsung,exynos850-cmu-aud
37 - samsung,exynos850-cmu-cmgp
38 - samsung,exynos850-cmu-core
39 - samsung,exynos850-cmu-cpucl0
40 - samsung,exynos850-cmu-cpucl1
41 - samsung,exynos850-cmu-dpu
42 - samsung,exynos850-cmu-g3d
43 - samsung,exynos850-cmu-hsi
44 - samsung,exynos850-cmu-is
45 - samsung,exynos850-cmu-mfcmscl
46 - samsung,exynos850-cmu-peri
52 clock-names:
56 "#clock-cells":
63 - if:
67 const: samsung,exynos850-cmu-top
73 - description: External reference clock (26 MHz)
75 clock-names:
77 - const: oscclk
79 - if:
83 const: samsung,exynos850-cmu-apm
89 - description: External reference clock (26 MHz)
90 - description: CMU_APM bus clock (from CMU_TOP)
92 clock-names:
94 - const: oscclk
95 - const: dout_clkcmu_apm_bus
97 - if:
101 const: samsung,exynos850-cmu-aud
107 - description: External reference clock (26 MHz)
108 - description: AUD clock (from CMU_TOP)
110 clock-names:
112 - const: oscclk
113 - const: dout_aud
115 - if:
119 const: samsung,exynos850-cmu-cmgp
125 - description: External reference clock (26 MHz)
126 - description: CMU_CMGP bus clock (from CMU_APM)
128 clock-names:
130 - const: oscclk
131 - const: gout_clkcmu_cmgp_bus
133 - if:
137 const: samsung,exynos850-cmu-core
143 - description: External reference clock (26 MHz)
144 - description: CMU_CORE bus clock (from CMU_TOP)
145 - description: CCI clock (from CMU_TOP)
146 - description: eMMC clock (from CMU_TOP)
147 - description: SSS clock (from CMU_TOP)
149 clock-names:
151 - const: oscclk
152 - const: dout_core_bus
153 - const: dout_core_cci
154 - const: dout_core_mmc_embd
155 - const: dout_core_sss
157 - if:
161 const: samsung,exynos850-cmu-cpucl0
167 - description: External reference clock (26 MHz)
168 - description: CPUCL0 switch clock (from CMU_TOP)
169 - description: CPUCL0 debug clock (from CMU_TOP)
171 clock-names:
173 - const: oscclk
174 - const: dout_cpucl0_switch
175 - const: dout_cpucl0_dbg
177 - if:
181 const: samsung,exynos850-cmu-cpucl1
187 - description: External reference clock (26 MHz)
188 - description: CPUCL1 switch clock (from CMU_TOP)
189 - description: CPUCL1 debug clock (from CMU_TOP)
191 clock-names:
193 - const: oscclk
194 - const: dout_cpucl1_switch
195 - const: dout_cpucl1_dbg
197 - if:
201 const: samsung,exynos850-cmu-dpu
207 - description: External reference clock (26 MHz)
208 - description: DPU clock (from CMU_TOP)
210 clock-names:
212 - const: oscclk
213 - const: dout_dpu
215 - if:
219 const: samsung,exynos850-cmu-g3d
225 - description: External reference clock (26 MHz)
226 - description: G3D clock (from CMU_TOP)
228 clock-names:
230 - const: oscclk
231 - const: dout_g3d_switch
233 - if:
237 const: samsung,exynos850-cmu-hsi
243 - description: External reference clock (26 MHz)
244 - description: External RTC clock (32768 Hz)
245 - description: CMU_HSI bus clock (from CMU_TOP)
246 - description: SD card clock (from CMU_TOP)
247 - description: USB 2.0 DRD clock (from CMU_TOP)
249 clock-names:
251 - const: oscclk
252 - const: rtcclk
253 - const: dout_hsi_bus
254 - const: dout_hsi_mmc_card
255 - const: dout_hsi_usb20drd
257 - if:
261 const: samsung,exynos850-cmu-is
267 - description: External reference clock (26 MHz)
268 - description: CMU_IS bus clock (from CMU_TOP)
269 - description: Image Texture Processing core clock (from CMU_TOP)
270 - description: Visual Recognition Accelerator clock (from CMU_TOP)
271 - description: Geometric Distortion Correction clock (from CMU_TOP)
273 clock-names:
275 - const: oscclk
276 - const: dout_is_bus
277 - const: dout_is_itp
278 - const: dout_is_vra
279 - const: dout_is_gdc
281 - if:
285 const: samsung,exynos850-cmu-mfcmscl
291 - description: External reference clock (26 MHz)
292 - description: Multi-Format Codec clock (from CMU_TOP)
293 - description: Memory to Memory Scaler clock (from CMU_TOP)
294 - description: Multi-Channel Scaler clock (from CMU_TOP)
295 - description: JPEG codec clock (from CMU_TOP)
297 clock-names:
299 - const: oscclk
300 - const: dout_mfcmscl_mfc
301 - const: dout_mfcmscl_m2m
302 - const: dout_mfcmscl_mcsc
303 - const: dout_mfcmscl_jpeg
305 - if:
309 const: samsung,exynos850-cmu-peri
315 - description: External reference clock (26 MHz)
316 - description: CMU_PERI bus clock (from CMU_TOP)
317 - description: UART clock (from CMU_TOP)
318 - description: Parent clock for HSI2C and SPI (from CMU_TOP)
320 clock-names:
322 - const: oscclk
323 - const: dout_peri_bus
324 - const: dout_peri_uart
325 - const: dout_peri_ip
328 - compatible
329 - "#clock-cells"
330 - clocks
331 - clock-names
332 - reg
337 # Clock controller node for CMU_PERI
338 - |
339 #include <dt-bindings/clock/exynos850.h>
341 cmu_peri: clock-controller@10030000 {
342 compatible = "samsung,exynos850-cmu-peri";
344 #clock-cells = <1>;
349 clock-names = "oscclk", "dout_peri_bus",