Lines Matching full:cmu_top
23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
24 dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
90 - description: CMU_APM bus clock (from CMU_TOP)
108 - description: AUD clock (from CMU_TOP)
144 - description: CMU_CORE bus clock (from CMU_TOP)
145 - description: CCI clock (from CMU_TOP)
146 - description: eMMC clock (from CMU_TOP)
147 - description: SSS clock (from CMU_TOP)
168 - description: CPUCL0 switch clock (from CMU_TOP)
169 - description: CPUCL0 debug clock (from CMU_TOP)
188 - description: CPUCL1 switch clock (from CMU_TOP)
189 - description: CPUCL1 debug clock (from CMU_TOP)
208 - description: DPU clock (from CMU_TOP)
226 - description: G3D clock (from CMU_TOP)
245 - description: CMU_HSI bus clock (from CMU_TOP)
246 - description: SD card clock (from CMU_TOP)
247 - description: USB 2.0 DRD clock (from CMU_TOP)
268 - description: CMU_IS bus clock (from CMU_TOP)
269 - description: Image Texture Processing core clock (from CMU_TOP)
270 - description: Visual Recognition Accelerator clock (from CMU_TOP)
271 - description: Geometric Distortion Correction clock (from CMU_TOP)
292 - description: Multi-Format Codec clock (from CMU_TOP)
293 - description: Memory to Memory Scaler clock (from CMU_TOP)
294 - description: Multi-Channel Scaler clock (from CMU_TOP)
295 - description: JPEG codec clock (from CMU_TOP)
316 - description: CMU_PERI bus clock (from CMU_TOP)
317 - description: UART clock (from CMU_TOP)
318 - description: Parent clock for HSI2C and SPI (from CMU_TOP)
346 clocks = <&oscclk>, <&cmu_top CLK_DOUT_PERI_BUS>,
347 <&cmu_top CLK_DOUT_PERI_UART>,
348 <&cmu_top CLK_DOUT_PERI_IP>;