bindings/clock/qcom%2Cx1e80100-gcc.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,x1e80100-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Rajendra Nayak <quic_rjendra@quicinc.com>
16   See also:: include/dt-bindings/clock/qcom,x1e80100-gcc.h
20     const: qcom,x1e80100-gcc
24       - description: Board XO source
25       - description: Sleep clock source
26       - description: PCIe 3 pipe clock
27       - description: PCIe 4 pipe clock
28       - description: PCIe 5 pipe clock
29       - description: PCIe 6a pipe clock
30       - description: PCIe 6b pipe clock
31       - description: USB QMP Phy 0 clock source
32       - description: USB QMP Phy 1 clock source
33       - description: USB QMP Phy 2 clock source
35   power-domains:
41   - compatible
42   - clocks
43   - power-domains
44   - '#power-domain-cells'
47   - $ref: qcom,gcc.yaml#
52   - |
53     #include <dt-bindings/power/qcom,rpmhpd.h>
54     clock-controller@100000 {
55       compatible = "qcom,x1e80100-gcc";
67       power-domains = <&rpmhpd RPMHPD_CX>;
68       #clock-cells = <1>;
69       #reset-cells = <1>;
70       #power-domain-cells = <1>;