bindings/clock/qcom%2Cmmcc.yaml

4 $id: http://devicetree.org/schemas/clock/qcom,mmcc.yaml#
7 title: Qualcomm Multimedia Clock & Reset Controller
14   Qualcomm multimedia clock control module provides the clocks, resets and
37   clock-names:
41   '#clock-cells':
55       Protected clock specifier list as per common clock binding
64   - '#clock-cells'
83             - description: PLL 3 clock
84             - description: PLL 3 Vote clock
85             - description: DSI phy instance 1 dsi clock
86             - description: DSI phy instance 1 byte clock
87             - description: DSI phy instance 2 dsi clock
88             - description: DSI phy instance 2 byte clock
89             - description: HDMI phy PLL clock
91         clock-names:
113             - description: MMSS GPLL0 voted clock
114             - description: GPLL0 voted clock
115             - description: GPLL1 voted clock
116             - description: GFX3D clock source
117             - description: DSI phy instance 0 dsi clock
118             - description: DSI phy instance 0 byte clock
120         clock-names:
141             - description: MMSS GPLL0 voted clock
142             - description: GPLL0 voted clock
143             - description: GPLL1 voted clock
144             - description: GFX3D clock source
145             - description: DSI phy instance 0 dsi clock
146             - description: DSI phy instance 0 byte clock
147             - description: DSI phy instance 1 dsi clock
148             - description: DSI phy instance 1 byte clock
149             - description: HDMI phy PLL clock
150             - description: eDP phy PLL link clock
151             - description: eDP phy PLL vco clock
153         clock-names:
180             - description: MMSS GPLL0 voted clock
181             - description: GPLL0 clock
182             - description: GPLL0 voted clock
183             - description: GPLL1 clock
184             - description: DSI phy instance 0 dsi clock
185             - description: DSI phy instance 0 byte clock
186             - description: DSI phy instance 1 dsi clock
187             - description: DSI phy instance 1 byte clock
188             - description: HDMI phy PLL clock
189             - description: eDP phy PLL link clock
190             - description: eDP phy PLL vco clock
192         clock-names:
220         - clock-names
232             - description: Global PLL 0 clock
233             - description: MMSS NoC AHB clock
234             - description: GFX3D clock
235             - description: DSI phy instance 0 dsi clock
236             - description: DSI phy instance 0 byte clock
237             - description: DSI phy instance 1 dsi clock
238             - description: DSI phy instance 1 byte clock
239             - description: HDMI phy PLL clock
241         clock-names:
263             - description: Global PLL 0 clock
264             - description: MMSS NoC AHB clock
265             - description: DSI phy instance 0 dsi clock
266             - description: DSI phy instance 0 byte clock
267             - description: DSI phy instance 1 dsi clock
268             - description: DSI phy instance 1 byte clock
269             - description: HDMI phy PLL clock
271         clock-names:
292             - description: Global PLL 0 clock
293             - description: DSI phy instance 0 dsi clock
294             - description: DSI phy instance 0 byte clock
295             - description: DSI phy instance 1 dsi clock
296             - description: DSI phy instance 1 byte clock
297             - description: HDMI phy PLL clock
298             - description: DisplayPort phy PLL link clock
299             - description: DisplayPort phy PLL vco clock
300             - description: Global PLL 0 DIV clock
302         clock-names:
328             - description: Global PLL 0 clock
329             - description: Global PLL 0 DIV clock
330             - description: DSI phy instance 0 dsi clock
331             - description: DSI phy instance 0 byte clock
332             - description: DSI phy instance 1 dsi clock
333             - description: DSI phy instance 1 byte clock
334             - description: DisplayPort phy PLL link clock
335             - description: DisplayPort phy PLL vco clock
337         clock-names:
353     clock-controller@4000000 {
356       #clock-cells = <1>;