bindings/clock/qcom%2Cipq5332-gcc.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,ipq5332-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on IPQ5332
10   - Bjorn Andersson <andersson@kernel.org>
14   domains on IPQ5332.
16   See also:: include/dt-bindings/clock/qcom,gcc-ipq5332.h
19   - $ref: qcom,gcc.yaml#
23     const: qcom,ipq5332-gcc
27       - description: Board XO clock source
28       - description: Sleep clock source
29       - description: PCIE 2lane PHY pipe clock source
30       - description: PCIE 2lane x1 PHY pipe clock source (For second lane)
31       - description: USB PCIE wrapper pipe clock source
33   '#power-domain-cells': false
34   '#interconnect-cells':
38   - compatible
39   - clocks
44   - |
45     clock-controller@1800000 {
46       compatible = "qcom,ipq5332-gcc";
53       #clock-cells = <1>;
54       #reset-cells = <1>;