bindings/clock/qcom%2Cgcc-ipq8064.yaml

1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on IPQ8064
10   - Ansuel Smith <ansuelsmth@gmail.com>
14   domains on IPQ8064.
17     include/dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
18     include/dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
21   - $ref: qcom,gcc.yaml#
26       - const: qcom,gcc-ipq8064
27       - const: syscon
32       - description: PXO source
33       - description: CXO source
34       - description: PLL4 from LCC
36   clock-names:
39       - const: pxo
40       - const: cxo
41       - const: pll4
43   thermal-sensor:
47       - $ref: /schemas/thermal/qcom-tsens.yaml#
49   '#power-domain-cells': false
52   - compatible
53   - clocks
54   - clock-names
59   - |
60     #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
61     #include <dt-bindings/interrupt-controller/arm-gic.h>
63     gcc: clock-controller@900000 {
64       compatible = "qcom,gcc-ipq8064", "syscon";
66       clocks = <&pxo_board>, <&cxo_board>, <&lcc PLL4>;
67       clock-names = "pxo", "cxo", "pll4";
68       #clock-cells = <1>;
69       #reset-cells = <1>;
71       tsens: thermal-sensor {
72         compatible = "qcom,ipq8064-tsens";
74         nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
75         nvmem-cell-names = "calib", "calib_backup";
77         interrupt-names = "uplow";
80         #thermal-sensor-cells = <1>;