bindings/clock/nvidia%2Ctegra124-car.yaml

1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/nvidia,tegra124-car.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Jon Hunter <jonathanh@nvidia.com>
11   - Thierry Reding <thierry.reding@gmail.com>
14   The Clock and Reset (CAR) is the HW module responsible for muxing and gating
31       - nvidia,tegra124-car
32       - nvidia,tegra132-car
37   '#clock-cells':
40   "#reset-cells":
43   nvidia,external-memory-controller:
49   "^emc-timings-[0-9]+$":
52       nvidia,ram-code:
59       "^timing-[0-9]+$":
62           clock-frequency:
68           nvidia,parent-clock-frequency:
77               - description: parent clock of EMC
79           clock-names:
81               - const: emc-parent
84           - clock-frequency
85           - nvidia,parent-clock-frequency
86           - clocks
87           - clock-names
94   - compatible
95   - reg
96   - '#clock-cells'
97   - "#reset-cells"
102   - |
103     #include <dt-bindings/clock/tegra124-car.h>
105     car: clock-controller@60006000 {
106         compatible = "nvidia,tegra124-car";
108         #clock-cells = <1>;
109         #reset-cells = <1>;