bindings/clock/mvebu-gated-clock.txt

1 * Gated Clock bindings for Marvell EBU SoCs
4 peripheral clocks to be gated to save some power. The clock consumer
5 should specify the desired clock by having the clock ID in its
6 "clocks" phandle cell. The clock ID is directly mapped to the
7 corresponding clock gating control bit in HW to ease manual clock
10 The following is a list of provided IDs for Armada 370:
11 ID	Clock	Peripheral
12 -----------------------------------
14 1	pex0_en	PCIe 0 Clock out
15 2	pex1_en	PCIe 1 Clock out
27 The following is a list of provided IDs for Armada 375:
28 ID	Clock		Peripheral
29 -----------------------------------
33 5	pex0		PCIe 0 Clock out
34 6	pex1		PCIe 1 Clock out
54 The following is a list of provided IDs for Armada 380/385:
55 ID	Clock		Peripheral
56 -----------------------------------
81 The following is a list of provided IDs for Armada 39x:
82 ID	Clock		Peripheral
83 -----------------------------------
95 The following is a list of provided IDs for Armada XP:
96 ID	Clock	Peripheral
97 -----------------------------------
122 The following is a list of provided IDs for 98dx3236:
123 ID	Clock	Peripheral
124 -----------------------------------
132 The following is a list of provided IDs for Dove:
133 ID	Clock	Peripheral
134 -----------------------------------
153 Note: gephy(30) is implemented as a parent clock of ge(2)
155 The following is a list of provided IDs for Kirkwood:
156 ID	Clock	Peripheral
157 -----------------------------------
176 - compatible : shall be one of the following:
177 	"marvell,armada-370-gating-clock" - for Armada 370 SoC clock gating
178 	"marvell,armada-375-gating-clock" - for Armada 375 SoC clock gating
179 	"marvell,armada-380-gating-clock" - for Armada 380/385 SoC clock gating
180 	"marvell,armada-390-gating-clock" - for Armada 39x SoC clock gating
181 	"marvell,armada-xp-gating-clock" - for Armada XP SoC clock gating
182 	"marvell,mv98dx3236-gating-clock" - for 98dx3236 SoC clock gating
183 	"marvell,dove-gating-clock" - for Dove SoC clock gating
184 	"marvell,kirkwood-gating-clock" - for Kirkwood SoC clock gating
185 - reg : shall be the register address of the Clock Gating Control register
186 - #clock-cells : from common clock binding; shall be set to 1
189 - clocks : default parent clock phandle (e.g. tclk)
193 gate_clk: clock-gating-control@d0038 {
194 	compatible = "marvell,dove-gating-clock";
196 	/* default parent clock is tclk */
198 	#clock-cells = <1>;
202 	compatible = "marvell,dove-sdhci";