bindings/clock/microchip%2Clan966x-gck.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/microchip,lan966x-gck.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip LAN966X Generic Clock Controller
10   - Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
13   The LAN966X Generic clock controller contains 3 PLLs - cpu_clk,
19     const: microchip,lan966x-gck
24       - description: Generic clock registers
25       - description: Optional gate clock registers
29       - description: CPU clock source
30       - description: DDR clock source
31       - description: System clock source
33   clock-names:
35       - const: cpu
36       - const: ddr
37       - const: sys
39   '#clock-cells':
43   - compatible
44   - reg
45   - clocks
46   - clock-names
47   - '#clock-cells'
52   - |
53     clks: clock-controller@e00c00a8 {
54         compatible = "microchip,lan966x-gck";
55         #clock-cells = <1>;
57         clock-names = "cpu", "ddr", "sys";