bindings/clock/mediatek%2Cmt8192-sys-clock.yaml

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt8192-sys-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Chun-Jie Chen <chun-jie.chen@mediatek.com>
19       - enum:
20           - mediatek,mt8192-topckgen
21           - mediatek,mt8192-infracfg
22           - mediatek,mt8192-pericfg
23           - mediatek,mt8192-apmixedsys
24       - const: syscon
29   '#clock-cells':
32   '#reset-cells':
36   - compatible
37   - reg
42   - |
43     topckgen: syscon@10000000 {
44         compatible = "mediatek,mt8192-topckgen", "syscon";
46         #clock-cells = <1>;
49   - |
50     infracfg: syscon@10001000 {
51         compatible = "mediatek,mt8192-infracfg", "syscon";
53         #clock-cells = <1>;
56   - |
57     pericfg: syscon@10003000 {
58         compatible = "mediatek,mt8192-pericfg", "syscon";
60         #clock-cells = <1>;
63   - |
64     apmixedsys: syscon@1000c000 {
65         compatible = "mediatek,mt8192-apmixedsys", "syscon";
67         #clock-cells = <1>;