Lines Matching +full:mt8188 +full:- +full:imp +full:- +full:iic +full:- +full:wrap +full:- +full:c
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt8188-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek Functional Clock Controller for MT8188
10 - Garmin Chang <garmin.chang@mediatek.com>
14 PLLs -->
15 dividers -->
17 -->
25 - mediatek,mt8188-adsp-audio26m
26 - mediatek,mt8188-camsys
27 - mediatek,mt8188-camsys-rawa
28 - mediatek,mt8188-camsys-rawb
29 - mediatek,mt8188-camsys-yuva
30 - mediatek,mt8188-camsys-yuvb
31 - mediatek,mt8188-ccusys
32 - mediatek,mt8188-imgsys
33 - mediatek,mt8188-imgsys-wpe1
34 - mediatek,mt8188-imgsys-wpe2
35 - mediatek,mt8188-imgsys-wpe3
36 - mediatek,mt8188-imgsys1-dip-nr
37 - mediatek,mt8188-imgsys1-dip-top
38 - mediatek,mt8188-imp-iic-wrap-c
39 - mediatek,mt8188-imp-iic-wrap-en
40 - mediatek,mt8188-imp-iic-wrap-w
41 - mediatek,mt8188-ipesys
42 - mediatek,mt8188-mfgcfg
43 - mediatek,mt8188-vdecsys
44 - mediatek,mt8188-vdecsys-soc
45 - mediatek,mt8188-vencsys
46 - mediatek,mt8188-wpesys
47 - mediatek,mt8188-wpesys-vpp0
52 '#clock-cells':
56 - compatible
57 - reg
58 - '#clock-cells'
63 - |
64 clock-controller@11283000 {
65 compatible = "mediatek,mt8188-imp-iic-wrap-c";
67 #clock-cells = <1>;