bindings/clock/mediatek%2Cmt8186-sys-clock.yaml

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt8186-sys-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Chun-Jie Chen <chun-jie.chen@mediatek.com>
14   PLLs -->
15           dividers -->
17                            -->
29       - enum:
30           - mediatek,mt8186-mcusys
31           - mediatek,mt8186-topckgen
32           - mediatek,mt8186-infracfg_ao
33           - mediatek,mt8186-apmixedsys
34       - const: syscon
39   '#clock-cells':
42   '#reset-cells':
46   - compatible
47   - reg
52   - |
53     topckgen: syscon@10000000 {
54         compatible = "mediatek,mt8186-topckgen", "syscon";
56         #clock-cells = <1>;