bindings/clock/mediatek%2Cmt8186-clock.yaml

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt8186-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek Functional Clock Controller for MT8186
10   - Chun-Jie Chen <chun-jie.chen@mediatek.com>
14   PLLs -->
15           dividers -->
17                            -->
25       - enum:
26           - mediatek,mt8186-imp_iic_wrap
27           - mediatek,mt8186-mfgsys
28           - mediatek,mt8186-wpesys
29           - mediatek,mt8186-imgsys1
30           - mediatek,mt8186-imgsys2
31           - mediatek,mt8186-vdecsys
32           - mediatek,mt8186-vencsys
33           - mediatek,mt8186-camsys
34           - mediatek,mt8186-camsys_rawa
35           - mediatek,mt8186-camsys_rawb
36           - mediatek,mt8186-mdpsys
37           - mediatek,mt8186-ipesys
41   '#clock-cells':
45   - compatible
46   - reg
51   - |
52     imp_iic_wrap: clock-controller@11017000 {
53         compatible = "mediatek,mt8186-imp_iic_wrap";
55         #clock-cells = <1>;