bindings/clock/mediatek%2Cmt6795-clock.yaml

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt6795-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek Functional Clock Controller for MT6795
10   - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
11   - Chun-Jie Chen <chun-jie.chen@mediatek.com>
15   PLLs -->
16           dividers -->
18                            -->
26       - mediatek,mt6795-mfgcfg
27       - mediatek,mt6795-vdecsys
28       - mediatek,mt6795-vencsys
33   '#clock-cells':
37   - compatible
38   - reg
39   - '#clock-cells'
44   - |
46         #address-cells = <2>;
47         #size-cells = <2>;
49         mfgcfg: clock-controller@13000000 {
50             compatible = "mediatek,mt6795-mfgcfg";
52             #clock-cells = <1>;
55         vdecsys: clock-controller@16000000 {
56             compatible = "mediatek,mt6795-vdecsys";
58             #clock-cells = <1>;
61         vencsys: clock-controller@18000000 {
62             compatible = "mediatek,mt6795-vencsys";
64             #clock-cells = <1>;