Lines Matching +full:s4 +full:- +full:peripherals +full:- +full:clkc
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022-2023 Amlogic, Inc. All rights reserved
4 ---
5 $id: http://devicetree.org/schemas/clock/amlogic,s4-peripherals-clkc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Amlogic S4 Peripherals Clock Controller
11 - Yu Tu <yu.tu@amlogic.com>
15 const: amlogic,s4-peripherals-clkc
23 - description: input fixed pll div2
24 - description: input fixed pll div2p5
25 - description: input fixed pll div3
26 - description: input fixed pll div4
27 - description: input fixed pll div5
28 - description: input fixed pll div7
29 - description: input hifi pll
30 - description: input gp0 pll
31 - description: input mpll0
32 - description: input mpll1
33 - description: input mpll2
34 - description: input mpll3
35 - description: input hdmi pll
36 - description: input oscillator (usually at 24MHz)
37 - description: input external 32kHz reference (optional)
39 clock-names:
42 - const: fclk_div2
43 - const: fclk_div2p5
44 - const: fclk_div3
45 - const: fclk_div4
46 - const: fclk_div5
47 - const: fclk_div7
48 - const: hifi_pll
49 - const: gp0_pll
50 - const: mpll0
51 - const: mpll1
52 - const: mpll2
53 - const: mpll3
54 - const: hdmi_pll
55 - const: xtal
56 - const: ext_32k
58 "#clock-cells":
62 - compatible
63 - reg
64 - clocks
65 - clock-names
66 - "#clock-cells"
71 - |
72 #include <dt-bindings/clock/amlogic,s4-peripherals-clkc.h>
74 clkc_periphs: clock-controller@fe000000 {
75 compatible = "amlogic,s4-peripherals-clkc";
91 clock-names = "fclk_div2", "fclk_div2p5", "fclk_div3", "fclk_div4",
94 #clock-cells = <1>;