Lines Matching +full:clock +full:- +full:tree
1 * Amlogic Meson8, Meson8b and Meson8m2 Clock and Reset Unit
3 The Amlogic Meson8 / Meson8b / Meson8m2 clock controller generates and
4 supplies clock to various controllers within the SoC.
8 - compatible: must be one of:
9 - "amlogic,meson8-clkc" for Meson8 (S802) SoCs
10 - "amlogic,meson8b-clkc" for Meson8 (S805) SoCs
11 - "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs
12 - #clock-cells: should be 1.
13 - #reset-cells: should be 1.
14 - clocks: list of clock phandles, one for each entry in clock-names
15 - clock-names: should contain the following:
17 * "ddr_pll": the DDR PLL clock
18 * "clk_32k": (if present) the 32kHz clock signal from GPIOAO_6 (CLK_32K_IN)
21 - compatible: "amlogic,meson-hhi-sysctrl", "simple-mfd", "syscon"
22 - reg: base address and size of the HHI system control register space.
24 Each clock is assigned an identifier and client nodes can use this identifier
25 to specify the clock which they consume. All available clocks are defined as
26 preprocessor macros in the dt-bindings/clock/meson8b-clkc.h header and can be
27 used in device tree sources.
30 dt-bindings/reset/amlogic,meson8b-clkc-reset.h (which can be used from the
31 device tree sources).
34 Example: Clock controller node:
36 clkc: clock-controller {
37 compatible = "amlogic,meson8b-clkc";
38 #clock-cells = <1>;
39 #reset-cells = <1>;
43 Example: UART controller node that consumes the clock generated by the clock
47 compatible = "amlogic,meson-uart";