bindings/clock/amlogic%2Cc3-pll-clkc.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022-2023 Amlogic, Inc. All rights reserved
4 ---
5 $id: http://devicetree.org/schemas/clock/amlogic,c3-pll-clkc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Amlogic C3 series PLL Clock Controller
11   - Neil Armstrong <neil.armstrong@linaro.org>
12   - Jerome Brunet <jbrunet@baylibre.com>
13   - Chuan Liu <chuan.liu@amlogic.com>
14   - Xianwei Zhao <xianwei.zhao@amlogic.com>
18     const: amlogic,c3-pll-clkc
25       - description: input top pll
26       - description: input mclk pll
27       - description: input fix pll
29   clock-names:
31       - const: top
32       - const: mclk
33       - const: fix
35   "#clock-cells":
39   - compatible
40   - reg
41   - clocks
42   - clock-names
43   - "#clock-cells"
48   - |
50         #address-cells = <2>;
51         #size-cells = <2>;
53         clock-controller@8000 {
54             compatible = "amlogic,c3-pll-clkc";
59             clock-names = "top", "mclk", "fix";
60             #clock-cells = <1>;