bindings/clock/allwinner%2Csun9i-a80-mmc-config-clk.yaml

1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-mmc-config-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A80 MMC Configuration Clock
10   - Chen-Yu Tsai <wens@csie.org>
11   - Maxime Ripard <mripard@kernel.org>
16   There is one clock/reset output per mmc controller. The number of
18   related to the overall mmc block.
21   "#clock-cells":
27   "#reset-cells":
31     const: allwinner,sun9i-a80-mmc-config-clk
42   clock-output-names:
46   - "#clock-cells"
47   - "#reset-cells"
48   - compatible
49   - reg
50   - clocks
51   - clock-output-names
56   - |
57     clk@1c13000 {
58         #clock-cells = <1>;
59         #reset-cells = <1>;
60         compatible = "allwinner,sun9i-a80-mmc-config-clk";
64         clock-output-names = "mmc0_config", "mmc1_config",