bindings/clock/allwinner%2Csun9i-a80-de-clks.yaml

1 # SPDX-License-Identifier: GPL-2.0+
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-de-clks.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A80 Display Engine Clock Controller
10   - Chen-Yu Tsai <wens@csie.org>
11   - Maxime Ripard <mripard@kernel.org>
14   "#clock-cells":
17   "#reset-cells":
21     const: allwinner,sun9i-a80-de-clks
28       - description: Bus Clock
29       - description: RAM Bus Clock
30       - description: Module Clock
32   clock-names:
34       - const: mod
35       - const: dram
36       - const: bus
42   - "#clock-cells"
43   - "#reset-cells"
44   - compatible
45   - reg
46   - clocks
47   - clock-names
48   - resets
53   - |
54     #include <dt-bindings/clock/sun9i-a80-ccu.h>
55     #include <dt-bindings/reset/sun9i-a80-ccu.h>
58         compatible = "allwinner,sun9i-a80-de-clks";
61         clock-names = "mod", "dram", "bus";
63         #clock-cells = <1>;
64         #reset-cells = <1>;