bindings/bus/brcm%2Cgisb-arb.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/brcm,gisb-arb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom GISB bus Arbiter controller
10   - Florian Fainelli <f.fainelli@gmail.com>
15       - items:
16           - enum:
17               - brcm,bcm7445-gisb-arb  # for other 28nm chips
18           - const: brcm,gisb-arb
19       - items:
20           - enum:
21               - brcm,bcm74165-gisb-arb  # for V7 new style 16nm chips
22               - brcm,bcm7278-gisb-arb  # for V7 28nm chips
23               - brcm,bcm7435-gisb-arb  # for newer 40nm chips
24               - brcm,bcm7400-gisb-arb  # for older 40nm chips and all 65nm chips
25               - brcm,bcm7038-gisb-arb  # for 130nm chips
26               - brcm,gisb-arb          # fallback compatible
34       - description: timeout interrupt line
35       - description: target abort interrupt line
36       - description: breakpoint interrupt line
38   brcm,gisb-arb-master-mask:
41       32-bits wide bitmask used to specify which GISB masters are valid at the
44   brcm,gisb-arb-master-names:
45     $ref: /schemas/types.yaml#/definitions/string-array
47       String list of the literal name of the GISB masters. Should match the
48       number of bits set in brcm,gisb-master-mask and the order in which they
52   - compatible
53   - reg
54   - interrupts
59   - |
60     gisb-arb@f0400000 {
61       compatible = "brcm,gisb-arb";
64       interrupt-parent = <&sun_l2_intc>;
65       brcm,gisb-arb-master-mask = <0x7>;
66       brcm,gisb-arb-master-names = "bsp_0", "scpu_0", "cpu_0";