Lines Matching +full:axi +full:- +full:dma +full:- +full:1
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/snps,dwc-ahci-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Serge Semin <fancer.lancer@gmail.com>
19 - $ref: ahci-common.yaml#
23 maxItems: 1
26 maxItems: 1
30 Basic DWC AHCI SATA clock sources like application AXI/AHB BIU clock,
31 PM-alive clock, RxOOB detection clock, embedded PHYs reference (Rx/Tx)
33 minItems: 1
36 clock-names:
37 minItems: 1
41 - description: Application APB/AHB/AXI BIU clock
43 - pclk
44 - aclk
45 - hclk
46 - sata
47 - description: Power Module keep-alive clock
49 - description: RxOOB detection clock
51 - description: PHY Transmit Clock
53 - description: PHY Receive Clock
55 - description: SATA Ports reference clock
62 minItems: 1
65 reset-names:
66 minItems: 1
70 - description: Application AHB/AXI BIU clock domain reset control
72 - arst
73 - hrst
74 - description: Power Module keep-alive clock domain reset control
76 - description: RxOOB detection clock domain reset control
78 - description: Reference clock domain reset control
82 "^sata-port@[0-9a-e]$":
83 $ref: '#/$defs/dwc-ahci-port'
88 dwc-ahci-port:
89 $ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port
96 snps,tx-ts-max:
98 description: Maximal size of Tx DMA transactions in FIFO words
99 enum: [ 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024 ]
101 snps,rx-ts-max:
103 description: Maximal size of Rx DMA transactions in FIFO words
104 enum: [ 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024 ]