bindings/ata/ahci-platform.yaml

1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: AHCI SATA Controller
10   SATA nodes are defined to describe on-chip Serial ATA controllers.
13   It is possible, but not required, to represent each port as a sub-node.
18   - Hans de Goede <hdegoede@redhat.com>
19   - Jens Axboe <axboe@kernel.dk>
26           - brcm,iproc-ahci
27           - cavium,octeon-7130-ahci
28           - hisilicon,hisi-ahci
29           - ibm,476gtr-ahci
30           - marvell,armada-3700-ahci
31           - marvell,armada-8k-ahci
32           - marvell,berlin2q-ahci
33           - qcom,apq8064-ahci
34           - qcom,ipq806x-ahci
35           - socionext,uniphier-pro4-ahci
36           - socionext,uniphier-pxs2-ahci
37           - socionext,uniphier-pxs3-ahci
39     - compatible
44       - items:
45           - enum:
46               - brcm,iproc-ahci
47               - marvell,armada-8k-ahci
48               - marvell,berlin2-ahci
49               - marvell,berlin2q-ahci
50               - qcom,apq8064-ahci
51               - qcom,ipq806x-ahci
52               - socionext,uniphier-pro4-ahci
53               - socionext,uniphier-pxs2-ahci
54               - socionext,uniphier-pxs3-ahci
55           - const: generic-ahci
56       - enum:
57           - cavium,octeon-7130-ahci
58           - hisilicon,hisi-ahci
59           - ibm,476gtr-ahci
60           - marvell,armada-3700-ahci
66   reg-names:
73   clock-names:
80   power-domains:
88   "^sata-port@[0-9a-f]+$":
89     $ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port
92       - required: [ phys ]
93       - required: [ target-supply ]
98   - compatible
99   - reg
100   - interrupts
103   - $ref: ahci-common.yaml#
105   - if:
110               - qcom,apq8064-ahci
111               - qcom,ipq806x-ahci
116         clock-names:
118             - const: slave_iface
119             - const: iface
120             - const: core
121             - const: rxoob
122             - const: pmalive
124         - phys
125         - phy-names
126         - clocks
127         - clock-names
129   - if:
133             const: socionext,uniphier-pro4-ahci
138             - description: reset line for the parent
139             - description: reset line for the glue logic
140             - description: reset line for the controller
142         - resets
149                 - socionext,uniphier-pxs2-ahci
150                 - socionext,uniphier-pxs3-ahci
155               - description: reset for the glue logic
156               - description: reset for the controller
158           - resets
167   - |
169         compatible = "snps,spear-ahci";
173   - |
174     #include <dt-bindings/interrupt-controller/arm-gic.h>
175     #include <dt-bindings/clock/berlin2q.h>
176     #include <dt-bindings/ata/ahci.h>
179         compatible = "marvell,berlin2q-ahci", "generic-ahci";
183         #address-cells = <1>;
184         #size-cells = <0>;
186         hba-cap = <HBA_SMPS>;
188         sata0: sata-port@0 {
192             target-supply = <&reg_sata0>;
194             hba-port-cap = <(HBA_PORT_FBSCP | HBA_PORT_ESP)>;
197         sata1: sata-port@1 {
201             target-supply = <&reg_sata1>;
203             hba-port-cap = <(HBA_PORT_HPCP | HBA_PORT_MPSP | HBA_PORT_FBSCP)>;