bindings/arm/arm%2Ccoresight-etm.yaml

1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-etm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Arm CoreSight Embedded Trace MacroCell
10   - Mathieu Poirier <mathieu.poirier@linaro.org>
11   - Mike Leach <mike.leach@linaro.org>
12   - Leo Yan <leo.yan@linaro.org>
13   - Suzuki K Poulose <suzuki.poulose@arm.com>
16   CoreSight components are compliant with the ARM CoreSight architecture
23   The Embedded Trace Macrocell (ETM) is a real-time trace module providing
31           - arm,coresight-etm3x
32           - arm,coresight-etm4x
33           - arm,coresight-etm4x-sysreg
35     - compatible
38   - if:
43               const: arm,coresight-etm4x-sysreg
47         - reg
52       - description:
55           - enum:
56               - arm,coresight-etm3x
57               - arm,coresight-etm4x
58           - const: arm,primecell
59       - description:
61         const: arm,coresight-etm4x-sysreg
70   clock-names:
73       - const: apb_pclk
74       - const: atclk
76   power-domains:
79   arm,coresight-loses-context-with-cpu:
84       contain a coresight component and CPU in the same power domain. When the
85       CPU powers down the coresight component also powers down and loses its
92       co-processor 14.
94   qcom,skip-power-up:
108   out-ports:
114         description: Output connection from the ETM to CoreSight Trace bus.
118   - compatible
119   - clocks
120   - clock-names
121   - cpu
122   - out-ports
127   - |
129         compatible = "arm,coresight-etm3x", "arm,primecell";
134         clock-names = "apb_pclk";
135         out-ports {
138                     remote-endpoint = <&funnel_in_port0>;
145         compatible = "arm,coresight-etm3x", "arm,primecell";
150         clock-names = "apb_pclk";
151         out-ports {
154                     remote-endpoint = <&funnel_in_port1>;