Lines Matching +full:big +full:- +full:endian +full:- +full:regs
27 BCP 14 `<https://www.rfc-editor.org/info/rfc2119>`_
28 `<https://www.rfc-editor.org/info/rfc8174>`_
38 -----
51 .. table:: Meaning of bit-width notation
63 For example, `u32` is a type whose valid values are all the 32-bit unsigned
64 numbers and `s16` is a type whose valid values are all the 16-bit signed
68 ---------
70 The following byteswap functions are direction-agnostic. That is,
74 * be16: Takes an unsigned 16-bit number and converts it between
75 host byte order and big-endian
76 (`IEN137 <https://www.rfc-editor.org/ien/ien137.txt>`_) byte order.
77 * be32: Takes an unsigned 32-bit number and converts it between
78 host byte order and big-endian byte order.
79 * be64: Takes an unsigned 64-bit number and converts it between
80 host byte order and big-endian byte order.
81 * bswap16: Takes an unsigned 16-bit number in either big- or little-endian
84 * bswap32: Takes an unsigned 32-bit number in either big- or little-endian
87 * bswap64: Takes an unsigned 64-bit number in either big- or little-endian
90 * le16: Takes an unsigned 16-bit number and converts it between
91 host byte order and little-endian byte order.
92 * le32: Takes an unsigned 32-bit number and converts it between
93 host byte order and little-endian byte order.
94 * le64: Takes an unsigned 64-bit number and converts it between
95 host byte order and little-endian byte order.
98 -----------
103 To `sign extend an` ``X`` `-bit number, A, to a` ``Y`` `-bit number, B ,` means to
106 #. Set the value of the remaining ``Y`` - ``X`` bits of `B` to the value of
107 the most-significant bit of `A`.
111 Sign extend an 8-bit number ``A`` to a 16-bit number ``B`` on a big-endian platform:
118 ------------------
142 * atomic32: includes 32-bit atomic operation instructions (see `Atomic operations`_).
143 * atomic64: includes atomic32, plus 64-bit atomic operation instructions.
144 * divmul32: includes 32-bit division, multiplication, and modulo instructions.
145 * divmul64: includes divmul32, plus 64-bit division, multiplication,
159 --------------------------
163 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
164 | opcode | regs | offset |
165 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
167 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
172 +-+-+-+-+-+-+-+-+
174 +-+-+-+-+-+-+-+-+
182 **regs**
184 on a little-endian host::
186 +-+-+-+-+-+-+-+-+
188 +-+-+-+-+-+-+-+-+
190 and as follows on a big-endian host::
192 +-+-+-+-+-+-+-+-+
194 +-+-+-+-+-+-+-+-+
197 the source register number (0-10), except where otherwise specified
198 (`64-bit immediate instructions`_ reuse this field for other purposes)
201 destination register number (0-10), unless otherwise specified
212 Note that the contents of multi-byte fields ('offset' and 'imm') are
213 stored using big-endian byte ordering on big-endian hosts and
214 little-endian byte ordering on little-endian hosts.
222 07 1 0 00 00 11 22 33 44 r1 += 0x11223344 // big
228 --------------------------
231 which uses two 32-bit immediate values. The 64 bits following
237 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
238 | opcode | regs | offset |
239 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
241 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
243 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
245 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
250 **regs**
268 -------------------
277 LD 0x0 non-standard load operations `Load and store instructions`_
281 ALU 0x4 32-bit arithmetic operations `Arithmetic and jump instructions`_
282 JMP 0x5 64-bit jump operations `Arithmetic and jump instructions`_
283 JMP32 0x6 32-bit jump operations `Arithmetic and jump instructions`_
284 ALU64 0x7 64-bit arithmetic operations `Arithmetic and jump instructions`_
291 ``JMP32``), the 8-bit 'opcode' field is divided into three parts::
293 +-+-+-+-+-+-+-+-+
295 +-+-+-+-+-+-+-+-+
308 K 0 use 32-bit 'imm' value as source operand
316 -----------------------
318 ``ALU`` uses 32-bit wide operands while ``ALU64`` uses 64-bit wide operands for
331 SUB 0x1 0 dst -= src
339 NEG 0x8 0 dst = -dst
350 the 64-bit or 32-bit value will wrap. If BPF program execution would
375 (``SDIV``, ``SMOD``, ``MOVSX``) have a non-zero 'offset'.
384 'imm' is interpreted as a 32-bit unsigned value. For ``ALU64``,
386 interpreted as a 64-bit unsigned value.
389 'imm' is interpreted as a 32-bit signed value. For ``ALU64``, 'imm'
391 interpreted as a 64-bit signed value.
397 (where -13 % 3 == -1) as implemented in C, Go, etc.::
399 a % n = a - n * trunc(a / n)
402 ``{MOVSX, X, ALU}`` :term:`sign extends<Sign Extend>` 8-bit and 16-bit operands into
403 32-bit operands, and zeroes the remaining upper 32 bits.
404 ``{MOVSX, X, ALU64}`` :term:`sign extends<Sign Extend>` 8-bit, 16-bit, and 32-bit
405 operands into 64-bit operands. Unlike other arithmetic instructions,
424 Shift operations use a mask of 0x3F (63) for 64-bit operations and 0x1F (31)
425 for 32-bit operations.
428 ----------------------
431 and a 4-bit 'code' field of ``END``.
436 For ``ALU``, the 1-bit source operand field in the opcode is used to
438 ``ALU64``, the 1-bit source operand field in the opcode is reserved
446 ALU LE 0 convert between host byte order and little endian
447 ALU BE 1 convert between host byte order and big endian
477 -----------------
479 ``JMP32`` uses 32-bit wide operands and indicates the base32
480 conformance group, while ``JMP`` uses 64-bit wide operands for
500 …CALL 0x8 0x1 call PC += imm {CALL, K, JMP} only, see `Program-loc…
510 is in units of 64-bit instructions relative to the instruction following
513 if the next instruction is a 128-bit wide instruction.
534 ``JMP`` class permits a 16-bit jump offset specified by the 'offset'
535 field, whereas the ``JMP32`` class permits a 32-bit jump offset
536 specified by the 'imm' field. A > 16-bit conditional jump may be
537 converted to a < 16-bit conditional jump plus a 32-bit unconditional
553 found in platform-specific documentation (e.g., Linux kernel documentation).
560 found in platform-specific documentation (e.g., Linux kernel documentation).
562 Program-local functions
564 Program-local functions are functions exposed by the same BPF program as the
567 the call instruction. An ``EXIT`` within the program-local function will
574 8-bit 'opcode' field is divided as follows::
576 +-+-+-+-+-+-+-+-+
578 +-+-+-+-+-+-+-+-+
588 IMM 0 64-bit immediate instructions `64-bit immediate instructions`_
592 MEMSX 4 sign-extension load operations `Sign-extension load operations`_
616 ---------------------------------
636 Sign-extension load operations
637 ------------------------------
639 The ``MEMSX`` mode modifier is used to encode :term:`sign-extension<Sign Extend>` load
650 -----------------
659 * ``{ATOMIC, W, STX}`` for 32-bit operations, which are
661 * ``{ATOMIC, DW, STX}`` for 64-bit operations, which are
663 * 8-bit and 16-bit wide atomic operations are not supported.
713 value that was at ``dst + offset`` before the operation is zero-extended
716 64-bit immediate instructions
717 -----------------------------
727 .. table:: 64-bit immediate instructions
743 * map_by_fd(imm) means to convert a 32-bit file descriptor into an address of a map (see `Maps`_)
744 * map_by_idx(imm) means to convert a 32-bit index into an address of a map
747 …ts the address of the instruction at a specified relative offset in number of (64-bit) instructions
774 -------------------------------------