arch/x86/pat.rst

1 .. SPDX-License-Identifier: GPL-2.0
4 PAT (Page Attribute Table)
7 x86 Page Attribute Table (PAT) allows for setting the memory attribute at the
8 page level granularity. PAT is complementary to the MTRR settings which allows
10 more flexible than MTRR due to its capability to set attributes at page level
20 WB   Write-back
22 WC   Write-combined
23 WT   Write-through
24 UC-  Uncached Minus
32 attributes at the page level. In order to avoid aliasing, these interfaces
38 +------------------------+----------+--------------+------------------+
40 +------------------------+----------+--------------+------------------+
41 | ioremap                |    --    |    UC-       |       UC-        |
42 +------------------------+----------+--------------+------------------+
43 | ioremap_cache          |    --    |    WB        |       WB         |
44 +------------------------+----------+--------------+------------------+
45 | ioremap_uc             |    --    |    UC        |       UC         |
46 +------------------------+----------+--------------+------------------+
47 | ioremap_wc             |    --    |    --        |       WC         |
48 +------------------------+----------+--------------+------------------+
49 | ioremap_wt             |    --    |    --        |       WT         |
50 +------------------------+----------+--------------+------------------+
51 | set_memory_uc,         |    UC-   |    --        |       --         |
53 +------------------------+----------+--------------+------------------+
54 | set_memory_wc,         |    WC    |    --        |       --         |
56 +------------------------+----------+--------------+------------------+
57 | set_memory_wt,         |    WT    |    --        |       --         |
59 +------------------------+----------+--------------+------------------+
60 | pci sysfs resource     |    --    |    --        |       UC-        |
61 +------------------------+----------+--------------+------------------+
62 | pci sysfs resource_wc  |    --    |    --        |       WC         |
64 +------------------------+----------+--------------+------------------+
65 | pci proc               |    --    |    --        |       UC-        |
67 +------------------------+----------+--------------+------------------+
68 | pci proc               |    --    |    --        |       WC         |
70 +------------------------+----------+--------------+------------------+
71 | /dev/mem               |    --    |   WB/WC/UC-  |    WB/WC/UC-     |
72 | read-write             |          |              |                  |
73 +------------------------+----------+--------------+------------------+
74 | /dev/mem               |    --    |    UC-       |       UC-        |
76 +------------------------+----------+--------------+------------------+
77 | /dev/mem               |    --    |   WB/WC/UC-  |  WB/WC/UC-       |
81 +------------------------+----------+--------------+------------------+
82 | /dev/mem               |    --    |    WB        |       WB         |
87 +------------------------+----------+--------------+------------------+
88 | /dev/mem               |    --    |    --        |       UC-        |
93 +------------------------+----------+--------------+------------------+
110 pgprot_writecombine() in step 1, followed by step 2.
112 In addition, step 2 internally tracks the region as UC or WC in memtype
117 as step 0 above and also track the usage of those pages and use set_memory_wb()
118 before the page is freed to free pool.
120 MTRR effects on PAT / non-PAT systems
123 The following table provides the effects of using write-combining MTRRs when
124 using ioremap*() calls on x86 for both non-PAT and PAT systems. Ideally
126 be a no-op on PAT enabled systems. The region over which a arch_phys_wc_add()
130 write-combining is desirable should consider use of ioremap_uc() followed by
131 set_memory_wc() to white-list effective write-combined areas.  Such use is
134 with size-constrained regions where otherwise MTRR write-combining would
139   MTRR  Non-PAT  PAT  Linux ioremap value        Effective memory type
141         PAT                                        Non-PAT |  PAT
147   WC    010      UC-  _PAGE_CACHE_MODE_UC_MINUS       WC*  |   UC
153 .. note:: -- in the above table mean "Not suggested usage for the API". Some
154   of the --'s are strictly enforced by the kernel. Some others are not really
157 For ioremap and pci access through /sys or /proc - The actual type returned
160 return uncached mapping in place of write-combine requested.
179   # mount -t debugfs debugfs /sys/kernel/debug
182   uncached-minus @ 0x7fadf000-0x7fae0000
183   uncached-minus @ 0x7fb19000-0x7fb1a000
184   uncached-minus @ 0x7fb1a000-0x7fb1b000
185   uncached-minus @ 0x7fb1b000-0x7fb1c000
186   uncached-minus @ 0x7fb1c000-0x7fb1d000
187   uncached-minus @ 0x7fb1d000-0x7fb1e000
188   uncached-minus @ 0x7fb1e000-0x7fb25000
189   uncached-minus @ 0x7fb25000-0x7fb26000
190   uncached-minus @ 0x7fb26000-0x7fb27000
191   uncached-minus @ 0x7fb27000-0x7fb28000
192   uncached-minus @ 0x7fb28000-0x7fb2e000
193   uncached-minus @ 0x7fb2e000-0x7fb2f000
194   uncached-minus @ 0x7fb2f000-0x7fb30000
195   uncached-minus @ 0x7fb31000-0x7fb32000
196   uncached-minus @ 0x80000000-0x90000000
202 "debugpat" boot parameter. With this parameter, various debug messages are
216  E    E     MTRR -> PAT init            Enabled    OS
217  E    D     MTRR -> PAT init            Disabled    -
218  D    E     MTRR -> PAT disable         Disabled   BIOS
219  D    D     MTRR -> PAT disable         Disabled    -
220  -    np/E  PAT  -> PAT disable         Disabled   BIOS
221  -    np/D  PAT  -> PAT disable         Disabled    -
222  E    !P/E  MTRR -> PAT init            Disabled   BIOS
223  D    !P/E  MTRR -> PAT disable         Disabled   BIOS
224  !M   !P/E  MTRR stub -> PAT disable    Disabled   BIOS
232  np	   "nopat" boot option specified