arch/x86/entry_64.rst

1 .. SPDX-License-Identifier: GPL-2.0
16 for 64-bit, arch/x86/entry/entry_32.S for 32-bit and finally
17 arch/x86/entry/entry_64_compat.S which implements the 32-bit compatibility
18 syscall entry points and thus provides for 32-bit processes the
19 ability to execute syscalls when running on 64-bit kernels.
25  - system_call: syscall instruction from 64-bit code.
27  - entry_INT80_compat: int 0x80 from 32-bit or 64-bit code; compat syscall
30  - entry_INT80_compat, ia32_sysenter: syscall and sysenter from 32-bit
33  - interrupt: An array of entries.  Every IDT vector that doesn't
36    magically-generated functions that make their way to common_interrupt()
39  - APIC interrupts: Various special-purpose interrupts for things
42  - Architecturally-defined exceptions like divide_error.
44 There are a few complexities here.  The different x86-64 entries
57 kernel mode and then when returning to user-space, and precisely
61 not* use SWAPGS blindly - nor must we forget doing a SWAPGS when it's
82 	js 1f   /* negative -> in kernel */
87 If we are at an interrupt or user-trap/gate-alike boundary then we can
92 user-space execution then we must do the SWAPGS.
94 But if we are in an NMI/MCE/DEBUG/whatever super-atomic entry context,
99 Therefore, super-atomic entries (except NMI, which is handled separately)
103  - Interrupt entry will use the slower gsbase check.
104  - Interrupt entry from user mode will switch off the IST stack.
105  - Interrupt exit to kernel mode will not attempt to reschedule.
108 that absolutely need the more expensive check for the GS base - and we