arch/m68k/buddha-driver.rst

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11 Buddha-part of the Catweasel Zorro-II version
21   product number: 0 (42 for Catweasel Z-II)
23   Rom-vector: $1000
25 The  card  should be a Z-II board, size 64K, not for freemem
26 list, Rom-Vektor is valid, no second Autoconfig-board on the
30 as  the Amiga Kickstart does:  The lower nibble of the 8-Bit
36 otherwise your chance is only 1:16 to find the board :-).
38 The local memory-map is even active when mapped to $e8:
41 $0-$7e		Autokonfig-space, see Z-II docs.
43 $80-$7fd	reserved
45 $7fe		Speed-select Register: Read & Write
48 $800-$8ff	IDE-Select 0 (Port 0, Register set 0)
50 $900-$9ff	IDE-Select 1 (Port 0, Register set 1)
52 $a00-$aff	IDE-Select 2 (Port 1, Register set 0)
54 $b00-$bff	IDE-Select 3 (Port 1, Register set 1)
56 $c00-$cff	IDE-Select 4 (Port 2, Register set 0,
59 $d00-$dff	IDE-Select 5 (Port 3, Register set 1,
62 $e00-$eff	local expansion port, on Catweasel Z-II the
66 $f00		read only, Byte-access: Bit 7 shows the
67 		level of the IRQ-line of IDE port 0.
69 $f01-$f3f	mirror of $f00
71 $f40		read only, Byte-access: Bit 7 shows the
72 		level of the IRQ-line of IDE port 1.
74 $f41-$f7f	mirror of $f40
76 $f80		read only, Byte-access: Bit 7 shows the
77 		level of the IRQ-line of IDE port 2.
80 $f81-$fbf	mirror of $f80
82 $fc0		write-only: Writing any value to this
87 		a buggy firmware and pull the IRQ line up
95 $fc1-$fff	mirror of $fc0
97 $1000-$ffff	Buddha-Rom with offset $1000 in the rom
99 		chip cannot be read. Rom is Byte-wide and
104 IRQ-lines  of  the  IDE-ports by reading from the three (two
105 for  Buddha-only)  registers  $f00, $f40 and $f80.  This way
121 If you're using the mirrored registers of the IDE-ports with
124 A6=1  (for example $840 for port 0, register set 0), a 780ns
126 command   access   to  the  harddisk/CD-Rom,  since  command
127 accesses  are Byte-wide and have to be made slower according
128 to the ATA-X3T9 manual.
130 Now  for the speed-register:  The register is byte-wide, and
142 about  30ns  to  the clocks on the Zorro bus, that's why the
143 values  are no multiple of 71.  One clock-cycle is 71ns long
147   497ns Select (7 clock cycles) , IOR/IOW after 172ns (2 clock cycles)
152   639ns Select (9 clock cycles), IOR/IOW after 243ns (3 clock cycles)
155   781ns Select (11 clock cycles), IOR/IOW after 314ns (4 clock cycles)
158   355ns Select (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
161   355ns Select (5 clock cycles), IOR/IOW after 172ns (2 clock cycles)
164   355ns Select (5 clock cycles), IOR/IOW after 243ns (3 clock cycles)
167   1065ns Select (15 clock cycles), IOR/IOW after 314ns (4 clock cycles)
170   355ns Select, (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
173 the timing will always be mode 0 8-bit compatible, no matter
176 781ns select, IOR/IOW after 4 clock cycles (=314ns) active.
178 All  the  timings with a very short select-signal (the 355ns
181 bus  interface,  making  the  whole access 497ns long.  This
189 Mhz  (for  example  the  NTSC-frequency  28,63636 Mhz), each
190 clock  cycle is shortened to a bit less than 70ns (not worth
198 compatible  with both the Buddha and the Catweasel Z-II, The
199 Buddha  acts  just  like  a  Catweasel  Z-II  with no device
200 connected  to  the  third  IDE-port.   The IRQ-register $f80