arch/m68k/buddha-driver.rst

59 $d00-$dff	IDE-Select 5 (Port 3, Register set 1,
124 A6=1  (for example $840 for port 0, register set 0), a 780ns
131 only  the  upper  three  bits are used (Bits 7 to 5).  Bit 4
137 The  values in this table have to be shifted 5 bits to the
138 left and or'd with $1f (this sets the lower 5 bits).
142 about  30ns  to  the clocks on the Zorro bus, that's why the
143 values  are no multiple of 71.  One clock-cycle is 71ns long
144 (exactly 70,5 at 14,18 Mhz on PAL systems).
147   497ns Select (7 clock cycles) , IOR/IOW after 172ns (2 clock cycles)
152   639ns Select (9 clock cycles), IOR/IOW after 243ns (3 clock cycles)
155   781ns Select (11 clock cycles), IOR/IOW after 314ns (4 clock cycles)
158   355ns Select (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
161   355ns Select (5 clock cycles), IOR/IOW after 172ns (2 clock cycles)
163 value 5
164   355ns Select (5 clock cycles), IOR/IOW after 243ns (3 clock cycles)
167   1065ns Select (15 clock cycles), IOR/IOW after 314ns (4 clock cycles)
170   355ns Select, (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
176 781ns select, IOR/IOW after 4 clock cycles (=314ns) active.
178 All  the  timings with a very short select-signal (the 355ns
181 bus  interface,  making  the  whole access 497ns long.  This
190 clock  cycle is shortened to a bit less than 70ns (not worth