arch/arm64/sme.rst

14 model.  To aid understanding, a minimal description of relevant programmer's
15 model features for SME is included in Appendix A.
19 -----------
26   instructions and registers, and the Linux-specific system interfaces
31   the SME2 instructions and ZT0, and the Linux-specific system interfaces
58   cpu-feature-registers.txt for details.
69   vectors from 0 to VL/8-1 stored in the same endianness invariant format as is
76 ------------------
84 3.  Sharing of streaming and non-streaming mode SVE state
85 ---------------------------------------------------------
88 between streaming and non-streaming modes.  When switching between modes
95 -------------------------
116 -------------------
134 * If matrix data is present, the remainder of the record has a vl-dependent
156 -----------------
176 --------------------
221       to be applied at the next execve() by the thread (dependent on whether
239       unspecified, including both streaming and non-streaming SVE state.
254     The following flag may be OR-ed into the result:
272 ---------------------
351 ---------------------------
373 --------------------------------
407 Appendix A.  SME programmer's model (informative)
411 ARMv8-A programmer's model that are relevant to this document.
417 ---------------
467 [3] Documentation/arch/arm64/cpu-feature-registers.rst