Lines Matching +full:- +full:multi +full:- +full:pin +full:- +full:mode
7 MFP stands for Multi-Function Pin, which is the pin-mux logic on PXA3xx and
15 mechanism is introduced from PXA3xx to completely move the pin-mux functions
16 out of the GPIO controller. In addition to pin-mux configurations, the MFP
17 also controls the low power state, driving strength, pull-up/down and event
18 detection of each pin. Below is a diagram of internal connections between
21 +--------+
22 | |--(GPIO19)--+
24 | |--(GPIO...) |
25 +--------+ |
26 | +---------+
27 +--------+ +------>| |
28 | PWM2 |--(PWM_OUT)-------->| MFP |
29 +--------+ +------>| |-------> to external PAD
30 | +---->| |
31 +--------+ | | +-->| |
32 | SSP2 |---(TXD)----+ | | +---------+
33 +--------+ | |
35 +--------+ | |
36 | Keypad |--(MKOUT4)----+ |
37 +--------+ |
39 +--------+ |
40 | UART2 |---(TXD)--------+
41 +--------+
44 mean it's dedicated for GPIO19, only as a hint that internally this pin
54 see arch/arm/mach-pxa/mfp-pxa300.h)
57 the remaining functions are pure GPIO-specific, i.e.
59 - GPIO signal level control
60 - GPIO direction control
61 - GPIO level change detection
63 3. Low power state for each pin is now controlled by MFP, this means the
68 (as defined in pxa3xx-regs.h) controls the wakeup from MFP
71 mean it is a GPIO signal, and by MFP<xxx> or pin xxx, we mean a physical
81 - #include "mfp-pxa25x.h"
82 - #include "mfp-pxa27x.h"
83 - #include "mfp-pxa300.h"
84 - #include "mfp-pxa320.h"
85 - #include "mfp-pxa930.h"
88 because pin configuration definitions may conflict in these file (i.e.
95 NOTE: PXA300 and PXA310 are almost identical in pin configurations (with
97 covered in a single mfp-pxa300.h.
99 2. prepare an array for the initial pin configurations, e.g.::
105 /* LCD - 16bpp Active TFT */
123 a) once the pin configurations are passed to pxa{2xx,3xx}_mfp_config(),
127 b) when there is only one possible pin configurations for a component,
131 c) if by board design, a pin can be configured to wake up the system
137 WAKEUP_ON_LEVEL_HIGH - specifically for enabling of keypad GPIOs,
139 to indicate that this pin has the capability of wake-up the system,
141 pin _will_ wakeup the system, it will only when set_irq_wake() is
145 d) although PXA3xx MFP supports edge detection on each pin, the
161 +-------------------------+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
162 | RESERVED |PS|PU|PD| DRIVE |SS|SD|SO|EC|EF|ER|--| AF_SEL |
163 +-------------------------+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
166 Bit 4: EDGE_RISE_EN - enable detection of rising edge on this pin
167 Bit 5: EDGE_FALL_EN - enable detection of falling edge on this pin
168 Bit 6: EDGE_CLEAR - disable edge detection on this pin
169 Bit 7: SLEEP_OE_N - enable outputs during low power modes
170 Bit 8: SLEEP_DATA - output data on the pin during low power modes
171 Bit 9: SLEEP_SEL - selection control for low power modes signals
172 Bit 13: PULLDOWN_EN - enable the internal pull-down resistor on this pin
173 Bit 14: PULLUP_EN - enable the internal pull-up resistor on this pin
174 Bit 15: PULL_SEL - pull state controlled by selected alternate function
177 Bit 0 - 2: AF_SEL - alternate function selection, 8 possibilities, from 0-7
178 Bit 10-12: DRIVE - drive strength and slew rate
179 0b000 - fast 1mA
180 0b001 - fast 2mA
181 0b002 - fast 3mA
182 0b003 - fast 4mA
183 0b004 - slow 6mA
184 0b005 - fast 6mA
185 0b006 - slow 10mA
186 0b007 - fast 10mA
191 Due to the difference of pin-mux handling between PXA2xx and PXA3xx, a unified
194 The basic idea of this design is to introduce definitions for all possible pin
197 make them effective there-after.
200 --------------
202 - arch/arm/mach-pxa/include/mach/mfp.h
205 1. Unified pin definitions - enum constants for all configurable pins
206 2. processor-neutral bit definitions for a possible MFP configuration
208 - arch/arm/mach-pxa/mfp-pxa3xx.h
210 for PXA3xx specific MFPR register bit definitions and PXA3xx common pin
213 - arch/arm/mach-pxa/mfp-pxa2xx.h
215 for PXA2xx specific definitions and PXA25x/PXA27x common pin configurations
217 - arch/arm/mach-pxa/mfp-pxa25x.h
218 arch/arm/mach-pxa/mfp-pxa27x.h
219 arch/arm/mach-pxa/mfp-pxa300.h
220 arch/arm/mach-pxa/mfp-pxa320.h
221 arch/arm/mach-pxa/mfp-pxa930.h
225 - arch/arm/mach-pxa/mfp-pxa3xx.c
226 - arch/arm/mach-pxa/mfp-pxa2xx.c
228 for implementation of the pin configuration to take effect for the actual
231 Pin Configuration
232 -----------------
238 * a possible MFP configuration is represented by a 32-bit integer
240 * bit 0.. 9 - MFP Pin Number (1024 Pins Maximum)
241 * bit 10..12 - Alternate Function Selection
242 * bit 13..15 - Drive Strength
243 * bit 16..18 - Low Power Mode State
244 * bit 19..20 - Low Power Mode Edge Detection
245 * bit 21..22 - Run Mode Pull State
249 * MFP_CFG_DEFAULT - default MFP configuration value, with
252 * low power mode = default
255 * MFP_CFG - default MFPR value with alternate function
256 * MFP_CFG_DRV - default MFPR value with alternate function and
257 * pin drive strength
258 * MFP_CFG_LPM - default MFPR value with alternate function and
259 * low power mode
260 * MFP_CFG_X - default MFPR value with alternate function,
261 * pin drive strength and low power mode
264 Examples of pin configurations are::
272 NOTE: this is the default setting of this pin being configured as SSP3_RXD
278 -----------------
280 Register settings on PXA3xx for a pin configuration is actually very
281 straight-forward, most bits can be converted directly into MFPR value
282 in a easier way. Two sets of MFPR values are calculated: the run-time
283 ones and the low power mode ones, to allow different settings.
285 The conversion from a generic pin configuration to the actual register
288 mfp-pxa2xx.c for how the conversion is made.